Senior Hardware Engineer - VHDL
Senior Hardware Engineer - VHDL Company Information For more than 25 years, Bio-Imaging Research, Inc. has designed and manufactured exceptional imaging systems.
BIR's work has a direct impact on the world in which we live.
Our award winning team of innovative specialists work in a friendly environment.
BIR Management recognizes that our employees are the most valuable assets, and it shows.
We offer a very generous benefits package, including: medical, dental and life insurance, long and short term disability, and 401(k)! Job Description Senior Hardware Engineer Company Information For more than 20 years, Bio-Imaging Research, Inc. has designed and manufactured exceptional imaging systems.
BIR's work has a direct impact on the world in which we live.
Our award winning team of innovative specialists work in a friendly environment.
BIR Management recognizes that our employees are the most valuable assets, and it shows.
We offer a very generous benefits package, including: medical, dental and life insurance, long and short term disability, 401(k) and an ESOP! Job Description We are looking for a LOCAL top-notch Hardware Engineer to join our highly skilled team to work with us to create the WORLD'S most advanced imaging products.
We are seeking a Hardware Engineer to participate in the research and development of a next generation visualization system.
The engineer will be responsible for the implementation of real-time 3D rendering algorithms in VHDL, testbench support, verification/simulation, synthesis, optimization and documentation of design.
Primary Responsibilities Implement high-performance 3D rendering algorithms in VHDL and with IP blocks.
Perform timing analysis, and optimize data paths and data accesses.
Support development of testbench.
Develop VHDL code to interface with existing memory and interface IP. Verification and simulation of the design in software and with HIL. Synthesis, place and route.
Support performance and quality testing.
Documentation of design.
Job Qualifications BS/MS in Electrical Engineering, with at least 5 years experience.
Extensive experience in RTL design, fluent in VHDL.
Development experience with Xilinx Virtex family of FPGAs (Virtex 4 desired).
Experience with test bench design and verification/simulation techniques (ModelSim, Aldec, XST) Experience with synthesis tools (Synplicity, ISE) Familiarity with memory (DDR, DDR2) and bus interfaces.
Strong background in mathematics and algorithm development.
Independent problem solver and self starter.
Excellent Communication skills C, Matlab and Simulink experience a plus.
For Additional Information E-mail resumes, INCLUDING SALARY EXPECTATION, to: HR [at] birinc [dot] com Please include REF: HJ275 BIR is an equal employment opportunity employer.
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