Engineer, ASIC Design: Marvell Semiconductor, Inc.
Marvell.
Moving Forward Faster.
Marvell offers revolutionary devices that touch every point of the communications infrastructure: switching, transceivers, wireless, PC connectivity, communications controllers, and storage.
Our continuous cycle of innovations has enabled Marvell to consistently deliver the industry's gold standard, emerging as the market leader in virtually all of our product categories.
Position Description: Responsibilities include: - Able to write Verilog RTL codes and follows design and DFT guidelines.
- Able to write test benches in Verilog and/or higher level languages like System Verilog or System C or Vera.
- Able to write verification test plans and test cases.
- Able to run synthesis, static timing analysis, formal verification.
- Understanding of timing closure.
- Understanding floor plan, placement and routing.
- Good working knowledge of backend flow and tools.
Qualifications
1. at least +2 years experience with a BSEE/MSEE or BSCE/MSCE2 Strong academic background (3.00/4.00 CGPA or higher) desired3 Demonstrated ASIC design background through direct work experience, internship or educational background4 Exposure to micro-architecture of whole design and/or sub-blocks and able to write detail engineering specifications5 Ability to write Verilog RTL codes and follow design and DFT guidelines, and write verification test plans6 Well experienced in Verilog programming, logic synthesis and gate timing7 Good working knowledge in floor plan, placement and routing.
8. Applicant must have good knowledge of IC design backend flows.
9. Experience in System Verilog or System C or any other higher level verification language is a plus.
Apply Only at : Marvell Semiconductor
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